Tag Archives: Wafer

Wafer-Level LED Test: CoO and Performance Roadmap

Recently our own Bryan Bolt presented at SEMICON West on the growing importance that LED device manufacturers are placing on cost reduction – with emphasis on wafer level LED test. The presentat… [View More]

Unattended Wafer Testing Over Multiple Temperatures

The demands to reduce time-to-market, shrink device geometry, and increase reliability are relentless in the semi-conductor development environment. That is why it is becoming even more critical to in… [View More]

1/f noise measurement solutions with on-wafer RTS characterization capability

At the following conferences in April and May we will exhibit Edge™ 1/f noise measurement solutions, which ensure precision device modeling and process development up to 40 MHz. We will showcas… [View More]